Results
Pareto
Analyze
Benchmarks
Submit
Credits
# of Code Lines
Compile Time
Simulation Time
ASIC Cells
ASIC Frequency
ASIC Energy
FPGA LUTs
FPGA Frequency
FPGA Energy
# of Code Lines
Compile Time
Simulation Time
ASIC Cells
ASIC Frequency
ASIC Energy
FPGA LUTs
FPGA Frequency
FPGA Energy
HDL
Benchmark
